diff --git a/media/gpu/h265_decoder.cc b/media/gpu/h265_decoder.cc
index b1467fd0aa06d..a38a637e6619b 100644
--- a/media/gpu/h265_decoder.cc
+++ b/media/gpu/h265_decoder.cc
@@ -1181,6 +1181,19 @@ bool H265Decoder::PerformDpbOperations(const H265SPS* sps) {
     return false;
   }
 
+  // RASL pictures associated with an IRAP that has NoRaslOutputFlag=1 are not
+  // decodable (their references precede the IRAP in decoding order) and per
+  // 8.1.2 are not output. The VA-API/V4L2 accelerator delegates skip the
+  // hardware decode for these pictures, so the backing surface is never
+  // written. Do not store such a picture in the DPB, otherwise a later
+  // picture whose RPS references its POC would inter-predict from an
+  // uninitialised GPU surface.
+  if (curr_pic_->no_rasl_output_flag_ &&
+      (curr_pic_->nal_unit_type_ == H265NALU::RASL_N ||
+       curr_pic_->nal_unit_type_ == H265NALU::RASL_R)) {
+    return true;
+  }
+
   // Put the current pic in the DPB.
   dpb_.StorePicture(curr_pic_, H265Picture::kShortTermFoll);
   return true;